 Figure.2. Timing Diagram of the RL78 Multiply/Divide/Accumulate (MDA) Unit The Timing Diagram of the RL78 Multiply/Divide/Accumulate (MDA) Unit is shown above.The Fixed Point Arithmetic was coded to make use of this Hardware MDA Unit in all of its operations to increase the speed. In some cases it was required to hand code in assemble language to make use of this unit. | The algorithm used for coding multiplication is shown below: • Initial setting <1> Set the multiplication/division control register (MDUC) to 00H. <2> Set the multiplicand to multiplication/division data register A (L) (MDAL). <3> Set the multiplier to multiplication/division data register A (H) (MDAH). (There is no preference in the order of executing steps <2> and <3>. Multiplication operation is automatically started when the multiplier and multiplicand are set to the MDAH and MDAL registers, respectively.) • During operation processing <4> Wait for at least one clock. The operation will end when one clock has been issued. • Operation end <5> Read the product (lower 16 bits) from multiplication/division data register B (L) (MDBL). <6> Read the product (higher 16 bits) from multiplication/division data register B (H) (MDBH). (There is no preference in the order of executing steps <5> and <6>.) • Next operation <7> To execute multiplication (unsigned) operation next, start from the “Initial setting” for multiplication (unsigned) operation. <8> The next time multiplication (signed), multiply-accumulation (signed or unsigned), or division is performed, start with the initial settings of each step.
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